Session T1-1: Compact Modeling for Technology Development and Chip Design

Time: 9:00-10:30, Oct. 21, 2025, Tuesday

Location: Meeting Room 2, 3rd Floor, Crowne Plaza Kunming City Centre

Speaker：Prof. Xing Zhou, IEEE EDS Distinguished Lecturer, Singapore
 

Session T1-2: Basics and Advances towards Wideband Continuous-time Delta-Sigma ADCs: Fundamentals, Recent Trends, and Perspectives

Time: 10:45-12:15, Oct. 21, 2025, Tuesday

Location: Meeting Room 2, 3rd Floor, Crowne Plaza Kunming City Centre

Speaker：Prof. Liang Qi, Shanghai Jiao Tong University, China

Session T2-1: Fundamentals of Emerging Memory Circuit Design for Embedded and AI Applications

Time: 13:30-15:00, Oct. 21, 2025, Tuesday

Location: Meeting Room 2, 3rd Floor, Crowne Plaza Kunming City Centre

Speaker：Prof. Jianguo Yang, Zhangjiang Laboratory, China

Session T2-2: AI-Driven Strategies for Accurate and Efficient Transistor Parameter Extraction in Next-Generation Device Modeling

Time: 15:15-16:45, Oct. 21, 2025, Tuesday

Location: Meeting Room 2, 3rd Floor, Crowne Plaza Kunming City Centre

Speaker：Dr. Ningmu Zou，Nanjing University , China