Invited Talks


First Name

Last Name

Affiliation

Country/Region

Topoic

Fengwei

An

School of Microelectronics, Southern University of Science and Technology

Japan

Real-time image recognition processor with high energy-efficiency for edge devices.

Asen

Asenov

University of Glasgow

UK

Advanced Simulation of RRAM memory cels

Francis

Balestra

Grenoble INP-Minatec / Sinano Institute

France

Nanoscale Devices for the end of the Roadmap

Mansun

Chan

Hong Kong University of Science & Technology

Hong Kong

Time of flight CMOS image sensor design

Edward Y

Chang

National Chiao Tung University

Taiwan

An FEG Enhanced Mode GaN HEMT For Power Switching Application

Meng-Fan

Chang

National Tsing Hua University

Taiwan

Circuit Design Challenges in Computing-in-Memory for AI Edge Devices

Kuei-Shu

Chang-Liao

National Tsing Hua University

Taiwan

Interface Engineering for High Performance Ge MOS and FinFETs

An

Chen

IBM

USA

Memory selector devices and crossbar arrays

Kuan-Neng

Chen

NCTU

Taiwan

Applications and Schemes based on 3D Heterogeneous Integration

Yuhua

Cheng

Peking University

China

Chao-Hsin

Chien

National Chiao Tung University

Taiwan

Extraction of metal/2D material contact resistanceDevice

Steve

Chung

National Chiao Tung University

Taiwan

Recent Advances of the
OTP Memory for Embedded Applications in HKMG Generation and Beyond

Yann

Deval

University of Bordeaux

France

Design of CMOS analog and RF integrated circuits for radiation hardening and its application to space electronics

Kazuhiko

Endo

National Institute of Advanced Industrial Science & Technology

Japan

Post-Si Nano Device Technology

Minoru

Fujishima

Hiroshima University

Japan

Ultrahigh-speed one-chip CMOS transceiver with 300 GHz band

Jifa

Hao

Fairchild Semiconductor

USA

Toshiro

Hiramoto

University of Tokyo

Japan

Temperature Dependence of Subthreshold Slope and DIBL Variability in Bulk and FDSOI MOSFETs

Mengyuan

Hua

UST

HK

Reliability and Stability of Advanced Gate Engineering for Enhancement-mode GaN-based MISFETDielectri

Mo

Huang

SCUT

China

CheolSeong

Hwang

Seoul National University

Korea

Technology review for the main memory and storage

Meikei

Ieong

TSMC

Taiwan

Makoto

Ikeda

University of Tokyo

Japan

Memory

Shyh-Jye

Jou

National Chiao Tung University

Taiwan

Design of Jointly Adaptive Estimation and Compensation for IQ Imbalance and DC Voltage Offset in a Single Carrier Baseband Receiver at 60GHz Band

Jinfeng

Kang

Peking University

China

Haruo

Kobayashi

Gunma University

Japan

Consideration of Time Domain Analog Circuits and Time-to-Digital Converter Architectures

Masaharu

Kobayashi

University of Tokyo

Japan

ChaoSung

Lai

Chang Gung University

Taiwan

Marco

Lanuzza

University of Calabria

Italy

Hybrid CMOS - Double Barrier MTJ circuits for logic and memory applications

Ching-Ting

Lee

National Cheng Kung University

Taiwan

Tai-Cheng

Lee

NTU

Taiwan

A very high-speed ADC or high-resolution oversampling ADC.

Frank

Lee

Synopsys

USA

Machine Learning Accelerated Robust Circuit Designs

Pei-Wen

Li

National Chiao Tung University

Taiwan

Yang

Li

Smarter Microelectronics

USA

Reconfigurable RF Power Amplifier in 5G/4G with RF-SOI CMOS

Horng-Chih

Lin

National Chiao Tung University

Taiwan

Xiaoyan

Liu

Peking University

China

Self-heating induced Variability and Reliability in Logic Circuits with Random Operation

Wayne

Luk

Imperial College London

UK

Non-nonlinear function evaluation reusing vector-matrix multipliers

Hans Juergen

Mattausch

Hiroshima University

Japan

Resource-efficient Haar-like-feature-based architecture for reliable machine vision and its VLSI implementation

Kyeong-Sik

Min

Kookmin Univ.

Korea

Memory

Makoto

Nagata

Kobe University

Japan

Wai Tung

Ng

University of Toronto

Canada

Smart Gate Driver ICs for GaN Power Transistors

Gang

Qu

University of Maryland

USA

Carlo

Reita

CEA/LETI

France

Neural Networks circuits based on resistive memories

Tzu-Hsien

Sang

NCTU

Taiwan

LiDAR Point Cloud Generation and Defogging for Vehicular Application

Alan

Seabaugh

University of Notre Dame

USA

Dynamics of Ferroelectric and Ionic Memories: Physics and Applications

Eddy

Simoen

IMEC

Belgium

Impact of device architecture and gate stack processing on the low-frequency noise of silicon nanowire transistors

Adam W.

Skorek

University of Quebec

Canada

Modern Electro-Thermal Analysis and Design in Integrated Circuits

Gerald

Sobelman

University of Minnesota

USA

Quantization Techniques for Deep Learning VLSI Systems

Jan Van der

Spiegel

University of Pennsylvania

USA

Sheldon

Tan

University of California, Riverside

USA

Artificial Intelligence (Process & Device)/ Process Simulation & Modeling

Roland

Thewes

University of Berlin

Germany

CMOS Multi Electrode Arrays for Neural Tissue Interfacing

C.C.

Wang

National Sun Yiet Sun University

Taiwan

related to HV CMOS IC Design

Runsheng

Wang

Peking University

China

OMI/TMI-based Modeling and Fast Simulation of Random Telegraph Noise (RTN) in Advanced Logic Devices and Circuits

Xingang

Wang

Skyworks

USA

Data Management Methodology

Shengkai

Wang

IME of CAS

China

Oxygen gate technology for SiC FET

Ngai

Wong

University of HK

Hong Kong

Nanjian

Wu

Institute of Semiconductors, Chinese Academy of Sciences

China

Design of high-speed drivers for 56Gb/s PAM4 Optical Communications in CMOS

Yanqing

Wu

Huazhong Univ. of Science and Technology

China

High performance electronics based on 2D materials and heterostructures

Ya-Hong

Xie

UCLA

USA

Jiawei

Xu

Fudan University

China

Bio-Impedance Sensor ICs Towards Medical Wearables

Cary Y.

Yang

Santa Clara University

USA

Yuchao

Yang

Peking University

China

Devices and Neural Networks for Efficient Computing

Minhao

Yang

EPFL

Switzerland

Ultra-Low-Power Intelligent Acoustic Sensing using Cochlea-Inspired Feature Extraction and DNN Classification

Zaixing

Yang

Shandong University

China

Super-high mobility of III-V nanowires field-effect transistors

Kiat Seng

Yeo

Singapore University of Technology And Design

Singapore

An inductorless 10-GHz differential dual regulated cascode transimpedance amplifier in 40-nm CMOS

Bei

Yu

Chinese University of HK

Hong Kong

VLSI Mask Optimization: from Shallow to Deep Learning

HongYu

Yu

Southern University of Science and Technology 

China

GaN HEMT Device

Shimeng

Yu

ASU

USA

Compute-in-memory for XNOR-SRAM design for machine learning accelerator

Wenjian

Yu

Tsinghua University

China

parasitic extraction and circuit simulation

J.F.

Zhang

Liverpool John Moores University

UK

Random Telegraph Noise Induced threshold voltage jitter

Weidong

Zhang

Liverpool John Moores University

UK

Impact of RTN and Variability on RRAM-Based Neural Network

Bo

Zhang

University of Electronic Science and Technology of China

China

High Reliability GaN FET Gate Drivers for Next-generation Power Electronics Technology

Weisheng

Zhao

Univ. Paris-Sud, Orsay

France

The recent progress on STT-MRAM for low power computing

Cezhou

Zhao

xjtlu

China

Solution-Processed Metal Oxide in Emerging Electronic Devices

Pingqiang

Zhou

Shanghai Tech University

China


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